Inverter

The inverter (NOT circuit) performs a basic logic function called inversion or complementation. The purpose of the inverter is to change one logic level (HIGH / LOW) to the opposite logic level. In terms of bits, it changes a ‘1’ to a ‘0’ and vice versa. The standard logic symbol for the inverter and a Venn diagram illustrating the relationship between the variables and the logic gate operation, are shown in Figure 1-1 and Figure 1-2, respectively.

    Figure 1-1 Standard Logic Symbol for Inverter

Figure 1-2 Venn diagram illustrating inverter operation

We generally express the logical operation of a gate with a truth table which lists all input combinations and the corresponding outputs. The truth table for the NOT gate is shown in Table 1-1.

                                    Table 1-1Truth table for NOT gate

where n is the number of input variables.

 

The AND gate

The AND gate, which is composed of two or more inputs and a single output, performs logical multiplication. The standard symbol for the AND gate is shown in Figure 1-3 and its truth table listed in Table 1-2. The logical operation of the AND gate is such that the output is HIGH (1) when all the inputs are HIGH, otherwise it is LOW (0). The Venn diagram shown in Figure 1-4 provides an insight into the AND function. The highlighted area represents the function X=AB.

Figure 1-3 Standard Logic Symbol for AND gate

Figure 1-4 Venn diagram illustrating AND operation

     Table 1-2 Truth table for AND gate

 

 

The OR gate

The OR gate, which is composed of two or more inputs and a single output, performs logical addition. The standard symbol for the OR gate is shown in Figure 1-5 and its truth table listed in Table 1-3. The logical operation of the OR gate is such that the output is HIGH (1) when any of the inputs are HIGH, otherwise it is LOW (0). The Venn diagram shown in Figure 1-6 provides an insight into the OR function. The highlighted area represents the function X=A+B.

Figure 1-5 Standard Logic Symbol for OR gate

     Table 1-3 Truth table for OR gate

 

Figure 1-6 Venn diagram illustrating OR operation

 

The NAND Gate

The NAND, which is composed of two or more inputs and a single output, is a very popular logic element because it may be used as a universal function. That is, it may be employed to construct an inverter, an AND gate, an OR gate, or any combination of theses functions. The term NAND is formed by the concatenation NOT-AND and implies an AND function with an inverted output. The standard symbol for the NAND gate is shown in Figure 1-7 and its truth table listed in Table 1-4. The logical operation of the NAND gate is such that the output is LOW (0) only when all the inputs are HIGH (1).

Figure 1-7 Standard logic symbol for NAND gate

  Table 1-4 Truth table for NAND gate

The NOR gate

The NOR gate, which is composed of two or more inputs and a single output, also has a universal property. The term NOR is formed by the concatenation NOT-OR and implies an OR function with an inverted output. The standard symbol for the NOR gate is shown in Figure 1-7 and its truth table listed in Table 1-5. The logical operation of the NOR gate is such that the output is HIGH (1) only when all the inputs are LOW.

Figure 1-7 Standard logic symbol for NOR gate

Table 1-5 Truth table for NOR gate

 

The Exclusive-OR (XOR) and Exclusive NOR (XNOR) gates

These gates are usually formed from the combination of the other logic gates already discussed. However, because of their functional importance, these gates are treated as basic gates with their own unique symbols. The truth tables for the XOR and XNOR gates, shown in Figure 1-8, are listed in Table 1-6. The Exclusive-OR is an "inequality" function and the output is HIGH (1) when the inputs are not equal to each other. Conversely, the Exclusive-NOR is an "equality" function and the output is HIGH (0) when the inputs are equal to each other.

Figure 1-8 Standard logic symbols for: (a) XOR (b) XNOR

Table 1-6 Truth table for XOR and XNOR logic gates

Copyright © Adrian Als , 1999
This page was last modified: Wednesday, April 12, 2000