EL10C - Basic Electronics
DIODES AND THEIR APPLICATIONS
http://scitec.uwichill.edu.bb/cmp/online/el10c/index.html
Chapter 1
Perfect IV characteristics
Zero resistance in one direction, a short circuit
Infinite resistance in the other, open circuit
The characteristics are those of a switch that can conduct current in only one direction
Arrowhead denotes forward direction for current flow
SEMI CONDUCTOR MATERIALS
The conductivity of a semiconductor material falls about midway between the extremes of an insulator and a conductor.
Resistivity as defined in terms of the dimensions of a material and as being the inverse of the conductivity.
Silicon and Germanium are the most commonly used semiconductor materials, there are many others.
Both of these can be manufactured to a high level of purity.
Very low levels of impurities can change the materials from relatively poor conductors to good conductors of electricity.
These impurities are introduced by a process called doping.
Heat and light can also have the same effect and are important considerations for the manufacture of heat and light sensitive devices.
Some of these qualities are due to the atomic structure of the germanium and silicon. The atoms form a pattern which is periodic in nature. A CRYSTAL is one complete pattern while a LATTICE is the periodic arrangement of CRYSTALS.
Any material composed of repeating crystal structures of this kind is called a SINGLE CRYSTAL structure.
For semiconductor materials of practical application in the electronics field this single crystal structure exists. It does not change significantly with the addition of impurities in the doping process.
In each case there are four electrons in the outermost valence shell.
The ionisation potential required to remove any one of these for valence electrons is lower than that for any electron in the structure.
In a pure crystal these four valence electrons are bonded to 4 adjoining atoms. Draw this.
Ge and Si are referred to as tetravalent atoms because they each have four electorns.
Bonding of atoms by the sharing of electrons is called covalent bonding.
These valence electrons can still absorb sufficient energy to break the covalent bond and assume the free state. They will then be sensitive to electric fields.
INTRINSIC materials are those which have been carefully refined to reduce the impurities to a very low level.
Increasing temperature will increase the number of valence electrons which break free and can contribute to current flow. This results in a decrease of resistance level. For conductors, the opposite is the result. Number of carriers is the same, but vibrations in lattice impedes their flow.
ENERGY LEVELS
There are discrete energy levels associated with each orbiting electron - DRAW ENERGY LEVEL DIAGRAM
Between discrete energy levels are gaps in which no electrons in the isolated atomic structure may appear
As atoms brought closer together to form the crystal lattice structure there is an interaction between them that will result in the electron in a particular orbit of one atom having slightly different energy levels from electrons in the same orbit of an adjoining atom.
Net result is an expansion of the discrete levels of possible of possible energy states for valence electrons into bands. - DRAW BANDS
There are boundary levels and maximum energy states in which an electron can find itself and there is a region between the valence band and ionisation level.
The energy of each electron is measured in electron volts (eV)
One electron volt = charge on one electron x one volt = 1.6x10-19 coulombs x 1 volt
At 0 K all valence electrons of semiconductor materials find themselves locked in their outermost shell of the atom with energy levels associated with the valence band.
At room temperature, a large number of valence electrons have acquired sufficient energy to leave the valence band, cross the energy gap and enter the conduction band.
Energy gap for Silicon 1.10 eV
Germanium 0.67 eV
Gallium Arsenide 1.41 eV
An insulator 5.00 eV
The conductor has electrons in the conduction band even at 0 K
Impurities added to an intrinsic semiconductor will cause energy states in the forbidden bands to occur which will cause a net reduction in the energy gap. Eg
EXTRINSIC MATERIALS
A semiconductor that has been exposed to the doping process is called an extrinsic material.
There are two types of extrinsic materials, n-type and p-type. Both are formed by adding a predetermined number of impurity atoms into a germanium or silicon base.
n-type Impurities with five valence electrons (pentavalent) are introduced
Such materials are antimony, arsenic and phosphorus See PERIODIC TABLE
They provide an extra electron for each atom added to the crystal lattice. It is loosely bound to its parent atom.
Diffused impurities with five valence electrons are called donor atoms
Energy band diagram now has a discrete energy level ( called the donor level) which appears in the forbidden band with an Eg significantly less than that of the intrinsic material. For silicon, 0.05 eV and for Germanium, 0.01 eV.
These electrons have no difficulty absorbing enough thermal energy at room temperature to move to the conduction band.
There are free carriers but the material is still electrically neutral, protons in nuclei equals electrons in orbit.
p-type Impurities with three valence electrons (trivalent) are introduced
Such materials are boron, gallium and indium See PERIODIC TABLE
DRAW effect on the crystal lattice with void, hole
There is now an insufficient number of electrons to complete the covalent bonds of the new lattice. The resulting vacancy is called a hole.
Since the resulting vacancy will accept a free electron, the diffused impurities with three valence electrons are called acceptor atoms.
The resulting p-type material is electrically neutral.
Electron vs hole flow
Transfer of electrons one way and hole the other. DRAW FLOW
Majority and minority carriers
In an n-type material, the electron is called the majority carrier and the hole the minority carrier.
In a p-type material, the hole is called the majority carrier and the electron is the minority carrier.
When the fifth electron leaves the parent atom it acquires a net positive charge, hence a positive sign in the donor ion representation. Likewise a negative sign for acceptor ions.
DRAW n-type and p-type material.
SEMICONDUCTOR DIODE
The semiconductor diode is formed by bringing n-type and p-type material together.
Electrons and holes in the region of the junction will recombine resulting in a lack of carriers in the region near the junction.
Depletion region due to the depletion of carriers (due to combination) in the region.
Two terminal device hence three possibilities for bias.
Minority carriers (holes) in the n-type material that find themselves in the depletion region will pass directly into the p-type material.
The closer the minority carrier is to the junction the greater the attraction for the layer of negative ions and the less the opposition of the positive ions in the depletion region.
Simiarly for the electrons in the p-type material.
Majority carrier (electrons) in the n-type material must overcome the attractive forces of the positive ions in the n-type material and the shield of negative ions in the p-type material to migrate into the area beyond the depletion region of the p-type material.
The number is so large that there will be some with the kinetic energy to pass through the depletion region into the p-type material.
Similarly for holes in the p-type material.
The relative magnitudes of the flows are such as to yield a net flow of Zero.
In the absence of an applied bias voltage, the net flow of charge in any one direction for a semiconductor diode is zero.
DRAW THE CASE OF NO APPLIED VOLTAGE
Majority carriers (electrons) in the n-type material are drawn to the positive potential of the applied voltage. This uncovers more positive ions in the depletion region of the n-type material.
For similar reasons, the number of uncovered negative ions will increase in the p-type material.
The depletion region widens and establishes too great a barrier fore the majority carriers to overcome.
The number of minority carriers entering the depletion region will not change resulting in the same minority carrier flows as occurred with no voltage.
The current that exists under reverse-bias conditions is called the reverse saturation current and is represented by Is.
It is seldom more than a few micro amperes.
DRAW THE CASE FOR THE REVERSED BIAS CONDITION
Majority carrier (electrons in n-type material) and holes (in p-type material) will recombine with the ions near the boundary and reduce the width of the depletion layer.
Minority carrier flow has not decreased in magnitude and is determined by the impurity levels which are small.
The decrease in width of the depletion layer results in a heavy majority flow across the junction. As the applied bias increases, the depletion region will decrease in width unto a flood of electrons can pass through the junction resulting in an exponential rise in current.
DRAW THE CASE FOR THE FORWARD BIAS CONDITION
DRAW THE CHARACTERISTICS THAT RESULT FROM THE FOREGOING
As the operating point of a diode moves from one region to another the resistance of the diode will also change due to the nonlinear shape of the characteristic curve. The type of applied voltage or signal will define the resistance level of interest.. Three different levels will be introduced.
DC or Static Resistance
The application of a dc voltage to a circuit containing a semiconductor diode will result in an operating point on the characteristic curve that will not change with time.
The resistance of the diode at the operating point is simply the quotient of the corresponding levels of VD and ID.
The dc resistance levels at the knee and below will be greater than the resistance levels obtained for the vertical rise section of the characteristics.
The resistance levels in the reverse bias region will be high.
In general, the lower the current through a diode the higher the dc resistance level.
DRAW CHARACTERISTIC AND DEMONSTRATE DC RESISTANCE
DO EXAMPLE WITH NUMBERS
AC or dynamic resistance
dc rsistance is independent of the shape of the characteristic in the region surrounding the point of interest.
For a sinusoidal input, the situation changes completely.
The varying input will move the instantaneous operating point up and down a region of the characteristics and defines a specific change in current and voltage.
DRAW CHARACTERISTIC AND DEMONSTRATE AC RESISTANCE
With no applied varying signal the point of operation would be the Q-point determined by the applied dc levels. The designation Q-point is derived from the word quiescent which means still or unvarying.
The tangent to the curve through the Q-point will define a particular change in voltage and current that can be used to determine the ac or dynamic resistance for this region of the diode characteristics.
The change in voltage and current should be as small as possible and equidistant to either side of the Q-point.
AC or dynamic resistance is defined as the quotient of the change in voltage divided by the change in current:
rd = delta Vd/delta Id
The steeper the slope the less the value of the change in Vd for the same change in Id and the less the resistance. The ac resistance in the vertical rise region of the characteristic is quite small while at lower current levels it is much higher.
In general, the lower the Q-point of operation, the higher the ac resistance.
DO EXAMPLE WITH NUMBERS
If the input swing is large enough to produce a broad swing, the resistance associated with the diode is called the average ac resistance. It is determined by a straight line drawn between the two intersections established by the maximum and minimum values of input voltage. DRAW CHARACTERISTIC AND DEMONSTRATE AVERAGE AC RESISTANCE
Average AC resistance
If the input swing is large enough to produce a broad swing, the resistance associated with the diode is called the average ac resistance.
It is determined by a straight line drawn between the two intersections established by the maximum and minimum values of input voltage.
DRAW CHARACTERISTIC AND DEMONSTRATE AVERAGE AC RESISTANCE
Piece-wise linear equivalent circuit
A series combination of an ideal diode, resistance and battery.
Simplified Equivalent circuit
The resistance is assumed small and ignored.
Ideal Equivalent Circuit
Only the ideal diode remains once the battery voltage is considered to be small enough to be ignored.
DRAW EQUIVALENT CIRCUITS
Avalanche breakdown
Silicon has certain advantages over Germanium and vice versa
Increasing Temperature increases the reverse saturation current,
TRANSITION AND DIFFUSION CAPACITANCE
Capacitance considerations become important at high frequencies.
When a diode is forward biased and free carriers are moving, it cannot immediately switch off when reversed biased. There is a recovery time. This effect comes into play at high frequencies.
DIODE TESTING
Laboratory experiments will demonstrate this. Make sure you do it.
Chapter 2 - DIODE APPLICATIONS
Load Line analysis can be done graphically using the diode characteristic. The Quiescent point can be found for the circuit. Changing the resistance value alters the slope of the load line, and hence the Quiescent point.
Results obtained using the actual characteristic of the diode are not significantly different when a simplified equivalent circuit, covered earlier is used. Likewise, the ideal diode can be used as the model in some circumstances to be covered later.
SERIES DIODE CONFIGURATIONS WITH DC INPUTS
Some examples of circuits will follow where the simplified equivalent circuit for a diode is used for analysis.
PARALLEL AND SERIES-PARALLEL CONFIGURATION
AND/OR GATES
Logic gates can be made with diodes and resistors.
SINUSOIDAL INPUTS; HALF WAVE RECTIFICATION
Ideal diode is the model used for analysis, but the simplified model can also be used
FULL WAVE RECTIFICATION
Simplest Zener circuit, voltage regulator......and page 2
General Derivation for fixed Vi and variable load resistor...... and page 2
General derivation for fixed load resistor and variable Vi
LIGHT EMITTING DIODES
Description....and page 2
TUTORIAL wk4 DIODES
Questions/answers
Work thru supplementary problems in Boylestad and Nashelsky chapters 1 to 2 except for those set to be handed in at tutorial wk5.
Set problems for handing in at tutorial wk5
TUTORIAL wk5 DIODES
Questions/answers
Work thru supplementary problems in Boylestad and Nashelsky chapters 1 to 2 except for those set to be handed in at tutorial wk6.
Set problems for handing in at tutorial wk6
TUTORIAL wk6 DIODES
Questions/answers
Work thru supplementary problems in Boylestad and Nashelsky chapters 1 to 2 except for those set to be handed in at tutorial wk7.
Set problems for handing in at tutorial wk7
