P21C (EL21C) – December 1999 – Answer any 3 questions

1. With reference to the 8085 CPU:

(a) Can an I/O port be assigned the address 124H ? Explain your answer. [4]

(b) Explain the process used by the 8085 in order that it can return from an interrupt.

[4]

(c) Your interrupt service routine for RST 6.5 is stored at 3456H. Explain how this routine is executed. [4]

(d) Write a commented Assembly Language (AL) program that will clear bits 0 and 1 of register D if both are set, set them if both are clear, and otherwise leave them alone. [4]

(e) Explain the bit-contents of register A, after the RIM instruction is executed. [4]

2 (a) Write an 8085 AL program to take 100 readings from the A/D converter shown in

Figure 1 below. Assume the A/D is interfaced to the SDK-85 microprocessor kit.

The readings should be stored in memory from location 1000H. Port 21H is

connected to the output data of the A/D. [10]

2 (b) Using Figure 2 below, write a subroutine which will display F8H to the two

7-segment displays. Assume register C contains the reading and the display

is latched when loaded. [10]

N.B: Programs should be commented and explained.

3. Explain how the hardware interrupts on the 8085 CPU operate. [10]

Carefully explain what stages are involved in executing a subroutine CALL and RET instructions. Use diagrams to illustrate the use of the Stack and other elevant registers. [8]

Explain how you could get a subroutine to not return to it’s correct position.

[2]

4.

Sketch the waveform of the ASCII character “k” ( 6BH) at a baud rate of 56K, even parity, 1-stop bit, and 8-data bits. [5]

Write an 8085 AL routine that will send out this character. (Ignore baud rate) [8]

In the program below, HALFBIT and BITTIME are subroutines that wait for half a bit period and one-bit period respectively. Explain what this subprogram does and what protocol it uses. [7]

SIDATA: RIM

RAL

JC SIDATA

CALL HALFBIT

MVI C,09H

NXTBIT: CALL BITTIME

RIM

RAL

DCR C

JZ RETURN

MOV A,B

RAR

MOV B,A

JMP NXTBIT

RETURN: RET

5 (a).

Write a program for the SDK-85 as an IC tester. Figure 3 below shows the I/O hardware needed to test a NAND gate. Your program should generate the input conditions to the NAND gate and activate LED 1 if the test fails, else activate LED 2 if the IC is good. [10]

5(b).

Using the 8155 timer port in Figure 4 below, load the timer with a 5 :sec value then immediately start the timer. Assume the CSR = 20H and the timer is connected to a 1 MHz clock. [ N.B: The timer should output the pulse every

5 :sec. ] [10]

END OF PAPER